 RU.HACKER (2:5020/351.16)  RU.HACKER 
 From : Oleg Nicolajchuk                    2:469/48        27 Apr 95  11:38:00
 Subj : 80188


  த  ᮢ,   ⠪ 80188,  
   ⠡, - ⨬ ﬨ ਢ :

                         INTEL  80188  FAMILY
Ŀ
NN                  188C188C188C188C188C188L188L188
                                          XL  EA  EB  EC  EA  EB 
Ĵ
 1.Direct Addr. Capability                                       
   Memory to 1 Mb                 +   +   +   +   +   +   +   +  
 2.Direct Addr. Capability I/O                                   
   to 64 Kb                       +   +   +   +   +   +   +   +  
 3.Numerics Coproces.Capability                                  
   8087 Interface                 +   +   +   +   +   +   +   +  
 4.Completely Obj Code Compatible                                
   with 8086/8088+New Instruction 10  10  10  10  10  10  10  10 
 5.DRAM Refresh Control Unit      +   +   +   +   +   +   +   +  
 6.Local Bus Controller           -   +   +   +   +   +   +   +  
 7.Program. Wait State Generator  -   +   +   +   +   +   +   +  
Ĵ
 8.Clock Generator                                               
     8    MHz                     +   -   -   -   +   -   -   +  
    10    MHz                     +   +   +   -   -   -   -   -  
    12.5  MHz                     -   +   +   +   +   +   +   +  
    16    MHz                     -   -   +   +   +   +   +   +  
    20    MHz                     -   -   +   +   -   -   +   -  
Ĵ
 9. Power Save Mode               -   +   +   +   +   +   +   +  
10. Power IDLE Mode               -   -   -   +   +   +   +   +  
11. Watchdog Timer 32 Bit         -   -   -   -   -   +   -   -  
12. Power Management Unit         -   -   -   -   -   +   -   -  
Ĵ
13. Independent DMA Channels      2   2   2   2   2   4   2   2  
    Compatible with 8237A         -   -   -   -   -   -   -   -  
Ĵ
14. Independent Progamm. Timers   3   3   3   3   3   3   3   3  
    Programmable Bits             16  16  16  16  16  16  16  16 
    Compatible with 8254A         -   -   -   -   -   -   -   -  
Ĵ
15. Programm.Interrupt Controller 1   1   1   1   1   2   1   1  
    Interrupt's inputs            4   4   4   4   5       4   5  
    Compatible with 8259A         -   -   -   -   -   +   -   -  
Ĵ
16. Independ.UART with integr. BRG-   -   -   -   -   2   -   -  
Ĵ
17. Upper Memory Chip-Select      1   1   1   1   1   1   1   1  
18. Lower Memory Chip-Select      1   1   1   1   1   1   1   1  
19. Periph.Chip-Select/Output Port5   5   5   5   8   8   5   8  
20. Periph.Chip-Select/Addr.  A1,22   2   2   2   2   2   2   2  
21. Programm.Memory Chip-Select                                  
    Logic ( 8Kb to 512Kb)         4   4   4   4   4   4   4   4  
22. Multiplexed I/O Bit Port      -   -   -   -   16  22  -   16 
Ĵ
23. Package:                                                     
      PLCC  68                    +   +   +   +   -   -   +   -  
      PGA   68                    +   +   +   -   -   -   -   -  
      JEDEC 68                    +   +   +   -   -   -   -   -  
      QFP   80                    -   -   +   +   +   -   +   +  
      PLCC  84                    -   -   -   -   +   -   -   +  
      QFP   100                   -   -   -   -   -   +   -   -  
      PQFP  100                   -   -   -   -   -   +   -   -  
Ĵ
24. Supply Current:                                              
    0      MHz  Vcc=5.25V     mkA -   -   100 100 100 100 100 100
    8      MHz  Vcc=5.5 V     mA  550 100 50  -   -   -   40  45 
    10     MHz  Vcc=5.5 V     mA  -   120 65  62  73  -   -   -  
    12.5   MHz  Vcc=5.5 V     mA  -   150 80  80  90  100 -   -  
    16     MHz  Vcc=5.5 V     mA  -   -   100 100 -   120 -   -  
    20     MHz  Vcc=5.5 V     mA  -   -   -   -   -   -   -   -  
    8      MHz  Vcc=2.7 V     mA  550 100 50  -   -   -   20  22 


---
 * Origin: * GLORIA * 20:00-08:00 * (2:469/48)

